Processors are implemented to execute a number of instructions on one or more data paths. Different data paths are designed to implement different types of operations or similar operations on data in different formats. Typically, a single processor core can include an arithmetic logic unit, a floating point unit, and special function units such as a load/store unit. The arithmetic logic unit can be configured to perform operations such as addition, subtraction, multiplication, and division on integer operands, and the floating point unit can be configured to perform operations such as addition, subtraction, multiplication, and division on floating point operands.
Floating-point values are typically represented in software using the Institute of Electrical and Electronics Engineers (IEEE) 754-2008 single-precision, 32-bit format or the IEEE 754-2008 double-precision, 64-bit format. However, using a lower precision format—such as the IEEE 754-2008 half-precision, 16-bit format—can significantly speed up computations when the extra precision is not required. The increase in speed comes at a price, typically resulting in a less-accurate result with a larger numerical error. It is of interest to minimize the numerical error, thereby maximizing accuracy of the result within a particular format when performing floating point computations.